DRAM is memory with excellent cell area, access speed, and rewrite endurance, but the data is volatile and there are considerable limitations in the use of the data. Various nonvolatile memory that may replace DRAM have been proposed in prior art. However, there is no known memory that surpasses DRAM performance with respect to cell area, access speed, and rewrite endurance, as shown in TABLE 1 below.
TABLE 1MJT-DRAMFLASHOUMRAMFeRAMVolatilityVolatileNon-vol.Non-vol.Non-Non-vol.vol.Cell area6-12μm27-11μm25-8μm2—LargeWrite time50ns1μs10ns30 ns80 nsErase time50ns~100ms50ns30 ns80 nsRead time50ns60ns20ns30 ns80 nsRewrite∞1E6>1E12>1E12>1E12enduranceRead∞∞∞>1E12>1E12endurance
Described in Japanese Patent Application Laid Open No. 2003-91463 is a memory device in which SDRAM with high operational speed is mounted together with nonvolatile flash memory. With the memory device described in the publication, write data sent from the host device to the memory device is temporarily stored in SDRAM and thereafter transferred from SDRAM to flash memory when a store command is received from the host device or when power is switched off. The data transferred to flash memory is transferred to SDRAM when power is switch on, and the host device writes and reads data at high speed to and from the SDRAM.
Described in Japanese Patent Application Laid Open No. 2003-229537 is a phase-change RAM (PCRAM) in which a phase-change memory cell is used. The PCRAM described in the publication is receiving much attention very recently because it has advantages in that the footprint of the memory cell is small and the access speed is high. Since DRAM (which is volatile memory) loses data when power is switched OFF, it is effective to dually mount nonvolatile memory to compensate for this drawback. However, there is a drawback when both DRAM and flash memory or other nonvolatile memory are mounted as described in the above publications in that the circuit configuration for transferring data between the two mounted memories is made more complex due to the differences in data structure between the two memories, and the access speed (write and erase speed) of flash memory decreases.
When, for example, both DRAM and MJT-RAM or FeRAM are mounted in structures in which DRAM is mounted together with a nonvolatile memory other than flash memory, the complexity of the cell structure and the cell area increases, and there are other problems. Thus, the mounting of both DRAM and nonvolatile memory proposed in the prior art makes it difficult to select nonvolatile memory that would provide a consolidated chip architecture that has excellent compatibility with DRAM. In view of the above, the combined mounting of PCRAM and DRAM described in Japanese Patent Application Laid Open No. 2003-229537 is under consideration. However, when both the PCRAM and DRAM are mounted, a considerable number of points must be considered regarding the circuit configuration, structure, and other aspects.
In view of the problems of the above-described prior art, an object of the present invention is to provide a memory device and a method for manufacturing a memory device that make it possible to configure a consolidated chip that uses PCRAM, which is nonvolatile memory with excellent compatibility with DRAM, does not increase the complexity of the circuitry, restrains the increase in footprint size, and increases the access speed.